All posts by Michel Stempin

Project Roadmap

In this log, we want to share our experience of bringing our FunKey Project from its early-prototype stage to a “Ready For Manufacturing” / “Community-Ready” state necessary to launch a successful crowdfunding campaign that in turn should provide us with the lever required to launch a product in mass production.

Where Do We Come From

People following the Funkey Project certainly remember that the original motivation came from @Sprite_tm‘s 2016 Hackaday superconference project of a pocket retro gaming console, that lead @c.Invent to develop the #Keymu – open source keychain-sized gaming console as a Proof-of-Concept that entered the 2017 Hackaday Prize. The corresponding Youtube video is now peaking at 4.8M views and #6 in Youtube’s Popular Videos – Game Consoles & Mobile Phones category!

Unfortunately, the tiny (and expensive) Intel Edison CPU module at the heart of the console was abruptly discontinued, which forced him to find a replacement module. Given the tiny dimensions, this prove to be very difficult, but @Squonk42 joined him to develop a new board around the LicheePi Zero module. Eventually, a new #Funkey Zero console which was used to validate the new CPU choice took part in the 2018 Hackaday Prize:

At this point, it became clear that the main feature of the #Keymu – open source keychain-sized gaming console was its foldable design, providing a maximum size for both the screen and keypads in the smallest form factor. It also became clear that such a hinged design required the help of a professional mechanical designer, and this challenge motivated @David.Larbi who joined the team at the beginning of this year. Read More

Layout: Screen FPC Extender

LCD Screen

The chosen LCD screen for the FunKey console is awesome:

Hinge

The FunKey console uses a foldable design in order to reduce the device size when not in use, and maximize both the screen and keypad size when playing. The screen flat cable must then go into the hinge, and in order to avoid too much stress that would eventually lead to broken cables, it must be “rolled” into it like a flypaper in order to divide the stress over the longest possible length.

Unfortunately, the stock LCD screen ribbon cable is not long enough. This is of course something that the manufacturer can customize, but this costs a fixed tooling fee of $800… We plan to go this way for mass production, but this sounds like a lot of money for the prototyping phase only.

FPC Extender

So, we decided to use cheaper alternatives for our prototypes:

  • for the Revision A, we used individually soldered thin enameled copper wires and an ultra small PCB placed into the hinge: definitely not something to use for more than 2 boards!
  • for the Revision B, we decided to invest some money into a customized FPC (Flat Printed Cable) as we can get 5x FPC prototypes for ~$100 at PCBWay

The problem is: I never designed FPCs before 😉

I got some basic hints from one of my colleague:

  • the copper density must be as constant as possible
  • the traces must use smooth curves instead of sharp angles to avoid tearing during flexion

However, a few questions remained unanswered:

  1. what material and thickness to use for the stiffeners?
  2. what material and thickness for the flex itself?
  3. which stack-up?

I decided to crawl the Web for more information, and here is what I found, I hope this may help some other PCB designers: Read More

Layout: Screen FPC Extender Update

The previous log detailed the screen FPC extender, used to adapt the stock LCD screen to the FunKey main PCB.

Before launching the FPC fabrication which is quite expensive (~ $100 / 5 pieces), we decided to have a dry run using a paper mock-up. Here is the result:

We covered the old Rev. A PCB with a paper print of the new Rev. B one, and created a paper version of the flex, gluing the connectors on them at the right positions. As you can see, the result is not too bad.

This was until we tried to open the lid flat:

Well, the FPC is a little bit too long, causing a “wave” that totally defeats the original purpose of the “flypaper design”: the small bend radius would certainly cause a failure sooner or later.

Moreover, the FPC is a little bit too wide, too, so it interferes with the internal ribs somehow.

So, back to the drawing board, we decreased the length by 2 mm, and the width to 4 mm, here is the result:

Much better! And the behavior when opening / closing the lid is also improved:

Here are the corresponding layouts:

FunKey Revision B is out!

Here it is: the FunKey Revision B is eventually out!

You can find the corresponding design file ZIP and schematics in PDF in the “File” section.

FunKey Revision A Board

We consider FunKey Revision A board as an “alpha test” board. We built 2 units using manual pick & place and a small T962 reflow oven.

Except for a few bad solder joints, the only real problem we encountered is a wrong value for the R11 DDR RAM equalization resistor (was 240k instead of 240R). Another minor problem was a wrong footprint for transistor Q1 (was SOT323 instead of SOT23)

We can consider it as a success, as the boards worked (almost) out of the box and we were able to mount them into a 3D-printed case and make some nice videos out of them.

However, assembling this board manually doesn’t scale up very nicely: as these are dual-sided PCBs, the boards needs to go twice in the oven, using solder paste with different reflow temperatures, and just placing the 175 components on each board takes hours and a lot of patience…

We thus decided to move to…

FunKey Revision B Board

The goals for this revision were:

  • correct the Revision A bugs
  • make some mechanical adjustments required to ease the FunKey assembly into the case
  • replace some components to reduce the BOM cost
  • add test pads for a better testability
  • outsource the PCB Assembly (PCBA)
  • avoid over-engineering a working board!

Bug Corrections

As discussed above, the only physical changes were to replace the value for the R11 DDR RAM equalization resistor (was 240k instead of 240R) in the BOM and to change the footprint for transistor Q1 (was SOT323 instead of SOT23).

A few quirks in the schematics were corrected:

  • the “START” and “SELECT” signal labels were swapped (now also renamed to “START” and “FUN”)
  • the comment for R8 was referencing the wrong chip (U2, now U3)
  • some signal labels around U5 were not the same size as all other labels

Mechanical Adjustments

Although we were able to mount the Revision A PCB into the 3D-case, we found some minor assembly problems:

  • the 1.5 mm headroom over the PCB button side was too low over some components (the power inductor L6 and the transistor Q1): L6 has been moved to the other PCB side with all components for the DRAM Power, and the Q1 transistor was moved away from the buttons
  • the screen connector has been moved to be in front of the hinge flex opening and turned 180° to expose all the active pins to on the PCB edge side
  • consequently, the UART and battery connectors have been shuffled around, and the battery connector moved away from the screw well to provide more room to bend the battery wires
  • the 2x Omron B3U-3000P(M) rear buttons have been replaced because they were too fragile and did not provide a good feedback when pressed. We now use 2x Panasonic EVP-AVAA1A, which are the right-angle equivalent of the EVP-BB2A9B000 we have for the top buttons. These buttons are backed by the PCB edge so they have no chance to break if pushed too hard, and their haptic feedback is really good
  • the speaker mounting was tedious: we tried to avoid having to solder wires, but the PCB thickness of 0.8 mm was too important to provide a way to bridge the gap between the trace and the speaker pad with a solder blob, we had to use some TH resistor wire to do the connection:

    We changed the design to use castellated pads (“half-moon” plated holes on the PCB edge) positioned farther just over the speaker pads, so the distance between the PCB copper pad and the speaker pad is now zero and allows soldering the speaker with just a small solder bridge

Component Sourcing

The FunKey Revision A board used mostly components available from major online distributors, ( we ordered them from Mouser, as they are today significantly cheaper than Radiospares, Farnell or even Digi-Key). OTOH, some exotic components (the Allwinner V3s CPU, the AXP209 PMIC and the microUSB connector) had to be sourced from AliExpress, as they were not available anywhere else at a cheaper price.

But mostly, the FunKey Revision A board should be considered as a “western” board, whose components are not optimized to be produced in China, which will be our final production country for obvious cost reasons.

We took the opportunity to roll out the FunKey Revision B to switch to mostly Chinese suppliers whenever possible. We found most of the components at www.lcsc.com and its Chinese sister website www.szlcsc.com.

The price difference there is significant, as passive components are 10x cheaper, connectors are 5x to 6x cheaper, and you can find some equivalent DC/DC or PMIC chips at a fraction of their western price. Another way of saving money is to avoid crossing borders: in this case, you’d better buy the components to mount on the PCB in China from China, if possible.

However, there are some components we still had to provision from global online distributors:

  • the L3/L4/L5 power inductors
  • the 0603 current measurement resistor R21
  • all the EVP-BB2A9B000 and EVP-AVAA1A (R/A) tactile switches as the required quantity was not in stock from LCSC
  • the S14 MEDER MK24 Reed switch (more on this later in this article!)
  • the SP1 CUI CDM-10008 speaker
  • the PCAL6416AHF,128 I2C GPIO expander U1
  • the PAM8301AAF audio amplifier U3

All other passive components were replaced by some available at LCSC, but not necessarily the cheapest ones: we chose the “cheapest available in quantity” ones instead, to make sure we don’t have to switch to another reference later.

We found equivalent parts for the MicroUSB and MicroSD card connectors and for the DRAM DC/DC U4, as well as for the crystals Y1/Y2. the AXP209 PMIC U5 was directly available there, too.

Only the Allwinner V3s CPU U3 had still to be sourced from Alibaba.

With these component changes, we are now confident that we can reach our target electronic BOM cost for MP (Mass Production).

PCBA Tests

Another very important point to consider in order to get a product that is RFM (Ready For Manufacturing) is to make sure to have a good test plan for the PCB/PCBA: you cannot count on everything working as expected without a glitch on thousands of pieces!

Of course you may ask the PCB manufacturer to perform 100% electrical test on the naked PCB using “flying probes”, but another important issue is to make sure the final PCBA (PCB Assembly) is good too.

The technique most suitable given our expected production quantities and board characteristics (small size and dual-sided) is to use test jigs with some retractable interfaces featuring either mating connectors and/or spring-loaded “Po-Go” pins that will make contacts with corresponding test pads on the PCB.

On the FunKey Revision A PCB, we already had some test pads, but they prove too small to be useful. For Revision B, we increased their size to 1 mm diameter, and we made sure to have all important signals available on the least populated PCB side (the button side).

We started to define a progressive test plan to check that all the parts on the assembled PCB perform as desired, using as little as possible steps and test vectors to make the test procedure as fast as possible: time is money on a production line!

Having a good test plan defined early in the design phase is a key point to reduce defects during MP.

Outsourced PCBA

As said earlier, the FunKey Revision A boards were assembled by us using a small reflow oven.

One major goal of the FunKey Revision B is to make sure that the board assembly can be outsourced, meaning that we are able to provide all the required information for this task, yet another key step towards a successful MP.

We took the opportunity of the limited-time (now over since July 31st) offer from SeeedStudio for free assembly for 5 pieces.

Conforming to SeedStudio requirements for gerbers files, pick and place files, assembly drawing and BOM file took us some considerable amount of time, but eventually, this will certainly help us to formalize the PCBA procedure for MP too.

We are still waiting to receive the boards that were approved for manufacturing, we cross our fingers and toes, hoping everything will go as expected!

New Features!

We tried very hard to avoid adding more features to the existing FunKey Revision A design that is working, but hey, we are engineers, after all!

But in order to avoid adding bugs by over-engineering the board, we limited them to 2 low-risk changes:

  • we added a separate LCD_RESET line for the LCD (just a single wire with a pull-up resistor R29, so we can reset the LCD without having to reset the whole board in case something goes bad with the display
  • we added a magnetic Reed switch S14 to the AXP209 PMIC’s N_OE (Negative Output Enable) input, in order to suspend the FunKey console after a delay when the lid is closed, and resume it back to where it stopped when the lid is opened again:

Conclusion

Given its limited design changes and large improvements in terms of electrical BOM cost optimization, testability and assembly outsourcing capabilities, the FunKey Revision B board must be considered as a “beta test” board, which is an important milestone towards our goal to produce the FunKey retro gaming console in large quantities in China.

Schematics: Power

Capacitor Usage

So far, we already encountered capacitors for many different usages:

Load Capacitors

We have seen load capacitors used with the 2 crystals in the discussion about CPU.

A quartz crystal always provides both series and parallel resonance, the series resonance being a few kilohertz lower than the parallel one.

Crystals below 30 MHz like ours are generally operated between series and parallel resonance, which means that the crystal appears as an inductive reactance in operation, this inductance forming a parallel resonant circuit with externally connected parallel “load” capacitance. Any small additional capacitance added in parallel with the crystal pulls the frequency lower in the range between the series and parallel resonance frequencies, insuring crystal startup and stable operation.

For modern circuits, these load capacitors have a typical small value < 20 pF.

Bulk Capacitors

Bulk capacitors are used to prevent a power supply from dropping too far during the periods when current is not available. At the same time, they help to reduce the power supply voltage ripples by smoothing their output voltage.

Many such capacitors are used at both the input and output of the numerous linear and switched mode power supplies in the PMIC discussion

The main bulk capacitor value is generally high (some µF), but there may be smaller parallel capacitors added for stability.

Coupling Capacitors

As you probably know, capacitors are made of 2 parallel conductive electrodes separated by a (thin) isolating dielectric material (even if these electrodes are rolled or layered to reduce the component size). Thus by construction, no DC (Direct Current) can flow from one electrode to the other, but by influence using the electric field, AC (Alternative Current) still can go through. This is how coupling capacitors are used to link 2 circuits while removing any DC bias voltage on one side or the other of the capacitor.

We use such a coupling capacitor in the Audio schematic description for feeding the audio power amplifier from the CPU audio output.

Filter Capacitors

We have seen many examples where capacitors are used within passive filter circuits along with resistors or inductors, mainly to remove unwanted frequencies from a power supply or a signal.

Decoupling (Bypass) Capacitors

We have already seen some decoupling capacitors when looking at the buttons circuit.

Active components such as transistors and chips are connected to their power supplies through conductors featuring a (small) common impedance made up of complex (resistive, capacitive and inductive) value. Because of these parasitic components, a device that suddenly draws some current in spikes will generate a drop in its voltage power supply. If many devices are sharing the same power supply and impedance, the state of one device will be coupled to the other ones through the common impedance of the power supply conductors and may affect thir operation.

In order to decouple the devices, capacitors placed as close as possible to the device power supply input pins are used, which act as local energy storage. These capacitors are also named “bypass capacitors” as they shunt transient energy from the power supplies past the device to be decoupled, right to the GND return path.

There may be different capacitors values placed on the same power supply pins in order to filter transients at different frequencies: the bigger the capacitor value, the lower the frequency. A typical value is 100 nF, and values from 1 µF to 10 µF are used for lower frequencies and / or higher current draws, while lower values of a few nF are used for filtering higher frequencies.

In essence, decoupling capacitors are not very different in their function from bulk capacitors: the only difference is one of scale, both of current and of transient duration. Bulk capacitors deal with large currents and periods of 10s of ms, whereas decoupling capacitors are used for much lower currents and much briefer periods (typically 10s of ns for TTL or CMOS devices) .

Schematics

The last part of the FunKey schematics merely contains only decoupling capacitors:

One exception is the Allwinner V3s CPU HPR/HPL circuit which features an RC-to-ground circuit between the amplifier and the preamplifier input with the resistor R27 and capacitors C79 and C81, as recommended in the V3s hardware design guide.

The only other remarkable point left in this schematic is the resistor divider R25 / R28 which provides a reference voltage at half the DRAM power supply voltage level, which is used for the integrated DDR2 DRAM merged drivers and dynamic on-chip termination already discussed at the end of the previous CPU schematic description.

Conclusion

This concludes the description of the FunKey gaming console electronic schematics. The full schematics is available in the design Zip file and in PDF format too.

As we have seen, the design is not overwhelmingly complex, but it contains many details that are all important to make sure the device works as expected.

Schematics: SD Card

The FunKey game console uses the SD Card both as its boot device and its only storage device, so a good operation of this interface is absolutely mandatory.

The Allwinner V3s provides 2x 4-bit MMC / SD Card / SDIO interfaces. In the FunKey, only interface #0 is used.

If you look on the Web, you will find many contradictory SD Card interface designs, with a combination of pull-up / pull-down resistors, ESD devices and power supply filtering, with all pins wired or not, such that it is very difficult to know what is really required. To better understand the situation, we need to go back to the specifications.

Specifications

The SD Card physical interface is provided in the “SD specifications, part 1, Physical Layer Specification version 2.00, May 9, 2006”, for which a simplified version is available here.

The MMC phyiscal interface can be found in the “Multi Media Card System Specification version 4.3, JESD84-A43, November 2007”, available here (registration required).

But a good summary of the requirements is given in the “AN10911 SD(HC)-memory card and MMC  Interface conditioning” application note from NXP, from which this schematic is taken:

Note: This schematic does not include details concerning card-supply and typical power-supply decoupling capacitors.

Write Protect (WP)

A write protect mechanical switch is provided in the full-size SD Card, but not in the mini or micro SD Card form factor. As we plan to use a micro SD Card only, it is not used for the FunKey, along with its pull-up resistor and ESD protection.

Card Detection (CD)

As the SD Card is required to boot the FunKey, is always inserted and opening the device is requried for its removal, we don’t need the optional card detect mechanical switch feature (even if the chosen connector provides it) and its related pull-up resistor and ESD protection.

The SD Card specification provides another mean to detect the card using a card built-in pull-up resistor on its DAT3 signal, that can be later disconnected during normal operation using he SET_CLR_CARD_DETECT (ACMD42) command. In order to correctly detect if the card is inserted, a high value external pull-down resistor (> 270 kohms) is required to drive the detect signal low when no card is inserted, while the card built-in 10-50 kohms resistor will drive this signal high when inserted.

However, this feature is not compatible with MMC cards, so its usage should be avoided and the mechanical detection is preferred.

Pull-Up Resistors

Both the SD Card and MMC specifications require not to leave the interface signals floating, except for the CLK signal, where a pull resistor would cause significant signal distortion because of the required high speed and short rise/fall times. OTOH, it is recommended to add a series resistor on this CLK signal as close as possible to the clock source (the CPU) to avoid ringing, as we already discussed it in the log about the CPU.

Hopefully, the Allwinner V3s CPU provides internal pull-up resistors for all these signals, so we don’t have to add external pull-up resistors. These resistors are given with a typical value of 100 kohms (50 min, 150 max). Unfortunately, the CMD signal for MMC card features an open-drain output mode, and its value should be undercut (down to 4.7 kohms) to guarantee a sufficiently short rise time in this mode.

Schematics

The FunKey SD Card interface schematic is the following:

Even if in the FunKey device the SD Card and its connector are not accessible without opening the enclosure, there may be some situations where the user may decide to do so. We thus attach an ESD protection TVS diode (D16, D17, D18, D25, D26, D27, D28) on each signal to avoid any ESD hazard.

As discussed above, a single pull-up resistor R10 is used on the CMD signal for MMC compatibility.

The micro SD Card connector built-in card detection switch is not used, since the card must always be inserted for the FunKey to boot, and the corresponding pins are thus connected to GND.

The SD Card power supply is done through an RC low-pass filter to provide a soft-start operation, as the card built-in large bulk capacitor on its power rail may collapse the supply voltage when initially powered up.

Schematics: SPI LCD

SPI LCD Screen

One of FunKey’s strong point is certainly its screen: in a chosen form factor of roughly 45x45x15mm (1.75×1.75×0.6″), it has to be comfortable enough to provide a good gaming experience.

If in theory this allows to shoehorn a 2.4″ (diagonal) square screen, in practice, these screens are seldom square and more rectangular in shape.

Unless you are a large manufacturer and selling millions of devices, you are limited to using the screens that are available on the market, which most of the time were designed for a long-forgotten specific devices (think of PDAs, MP3 players, clam-shell phones, pods, etc.) and standard aspect ratio are either 5:3 or 16:10. Thus, for a given pixel technology, this results in rather standard screen sizes.

So the next size down is 1.8″, but these screens tend to be quite thick and based on an old technology, so their typical resolution is rather limited @ 128×160 pixels: too small for gamers.

Still going down in size, you can find 1.5~1.55″ screens with an interesting resolution of 240×240 or even 320 x 320 (“Retina”) pixels, but most of them use a fast and complex MIPI DSi interface requiring a dedicated controller on the host side. These screens were popular as the screen used in 6th-generation iPods, but unfortunately, getting a retail CPU with a MIPI DSi interface is almost impossible.

Fortunately, we found this 1.54″ LCD screen on AliBaba:

What makes this screen remarkable is its standard SPI interface, which like the MIPI DSi one, only requires a few wires and thus a narrow flex cable, easy to roll into a hinge.

This 1.54″ display has 240×240 16/18-bit full color pixels and is an IPS display, so the color looks great up to 80 degrees off-axis in any direction.

Be careful though, as in order to achieve a 30 fps @ 240 x 240 pixel resolution in RGB666 (3 bytes / pixel), this requires a ~40 MHz SPI clock rate. Once again, we were fortunate as both the V3s CPU and the screen built-in controller (a Sitronix ST7789V) support this high clock speed (after checking with the manufacturer and despite the controller datasheet specifies only a serial clock cycle (Write) of 66 ns or 15 MHz!).

We were even luckier as its backlight consists in 3 white LEDs in parallel and not in series, such that no additional step-up DC-DC converter is required, as a standard 3.3V / 60 mA (typical) power supply is sufficient. Of course, we won’t be able to drive this current directly from a CPU GPIO and the backlight will require an additional transistor to interface to the LCD backlight.

Its flex cable requires a mating Hirose 0.4 mm pitch DF37NB-24DS-0.4V dual row SMT connector, out of which only one single row is actually used.

Schematic

The schematic is thus quite simple:

The main component is of course the Hirose screen connector J3, with the following signals:

  • LEDA: the backlight LED Anode connection (+)
  • GND
  • +3V3 power supply
  • /SPI_CS: SPI Chip Select
  • SPI_MOSI: SPI Master Out / Slave In
  • SPI_CLK: SPI Clock
  • RS: LCD-specific Register/Memory Select (or Data/Control Select)
  • /RESET: LCD Reset

All data signals feature an ESD TVS protection diode D19-D20, and except for the power supplies and LEDA + /RESET signals, all signals are directly connected to the V3s CPU’s SPI interface, so there is not much to say about these.

The /RESET signal is currently tied to the PMIC PWR_OK output, but in a future revision, we plan to change this so it is instead controlled from a CPU GPIO pin.

Backlight PWM

The backlight control requires a few more components: a MOSFET-P transistor Q1 and 2 resistors R5 and R7 to provide its polarization, more on this below.

As the backlight LEDs cathode (-) pin are directly tied to GND within the screen, we need to drive these LEDs “from the high-side”, i.e. between the +3V3 power supply and the LEDA pin, so a MOSFET-P transistor is necessary:

As we want the backlight to be on by default, we need to drive it to GND by default: this is the role of R7. The role of R5 is then to make sure that -Vgs is driven below its threshold voltage and turns off the transistor when the CPU drives a GPIO high.

As an ultimate sophistication, we can drive the backlight from the CPU using one of its PWM built-in controllers with a varying duty-cycle, thus controlling the LCD backlight brightness accurately.

Schematics: DRAM Power

The attentive reader may have noticed that the PMIC covered in the previous log only provides 2 out of the 3 required DC-DC…

This is because the AXP20x is originally the PMU (Power Management Unit) used by most Allwinner SoCs (A10, A13 and A20), which do not integrate SDRAM, so the board designer has a wide choice of memory option: DDR2, DDR3, DDR3L, LPDDR3, LPDDR4 with various voltage requirements.

But no specific PMIC was created for the Allwinner V3s used in the FunKey device which however integrates a fixed SIP (System In Package) 512Mbit (64MB) DDR2 SDRAM.

We thus have to design a separate SMPS (DC-DC) power supply for providing the +1.8V 1A required for the DDR2 DRAM power supply.

For this purpose, we followed closely the Allwinner Reference Design which provides the same circuit, based on common pin-compatible SY8088 or LP3220 Chinese Buck DC-DC converter chips. But since these chips are not easy to provision in our place, we replaced it by a performance and pin-compatible AP3418KTR-G1 chip.

Here is the corresponding DRAM Power schematics:

Nothing very fancy here: the SMPS chip U4 has its required input filter capacitor C37 and output capacitors C65 and C73.

The low-profile ferrite-core power inductor L6  (rated with a saturation current of 1.76A and low < 0.1 ohm resistance) provides the DC-DC energy storage element.

The R20 / R23 precision voltage divider provides the required +0.6V feedback voltage from the +1.8V output voltage by having a 1/3 resistor ratio.

The last component is a pull-up resistor R19 which ties the SMPS chip enable input to its active level permanently. The pull-up voltage is +3.0V (just as in the original reference design), probably as it is the next higher voltage available, in order to limit the current in it to its lowest possible value.

OK, all power supplies are now covered!

Schematics: PMIC

From the previous logs, we can summarize the V3s power supply requirements to:

  • SMPS for +3.3V / 1.2A for the I/O power supply
  • LDO for +3.3V_AO / 30 mA for the Always-On power supply (RTC timer)
  • LDO for +3.0V / 200 mA for the analog power supply
  • SMPS for +1.8V / 1A for the DDR2 DRAM power supply
  • SMPS for +1.25V / 1.6 A for the core power supply

On the LicheePi Zero board used in our FunKey Zero prototype, a triple SMPS EA3036 is used for generating these +3.3V, +1.8V  and +1.2V voltages, with an additional XC6206 LDO for the +3.0V (the +3.3V Always On is connected directly to +3.3V). Although compact (the EA3036 is a tiny 3 mm x 3 mm QFN20 package), this solution is not ideal as it does not provide a battery charger and monitoring capability, which is a requirement for the FunKey device.

PMICs

Sophisticated SoC requiring multiple voltages, high current and proper sequencing are common today and hopefully, all major manufacturers generally provide dedicated companion chips called PMICs (Power Management Integrated Circuits), in charge of these tasks. Allwinner is not an exception through its sister company X-Powers.

Their AXP20x products are highly-integrated PMICs that are optimized for applications requiring single-cell Li-battery (Li- Ion/Polymer) and multiple output DC-DC converters.and LDOs. Here is a block diagram:

The AXP20x features:

  • A wide choice of input power source, the best source is chosen as IPSOUT inside the IPS (Intelligent Power Select) block :
    • USB VBUS
    • Battery BAT
    • ACIN wall plug (not used in FunKey)
    • BACKUP battery (not used in FunKey)
  • A 1.8A fast PWM battery charger (also called DC/DC1) with battery voltage / current sense and programmable charge indication LED
  • A soft key power-on/off logic with timer (just as in smartphones!)
  • An I2C interface with interrupt signal to communicate with the CPU
  • An optional battery temperature monitoring if the battery is equipped with an NTC resistor (not used in FunKey)
  • A reference voltage
  • A built-in 12-channel 12 bit ADC that measures various voltage and current data, as well as feeding an internal Coulomb counter and fuel gauge system (more on this later)
  • A power OK output used to generate the global RESET signal in FunKey
  • 5x GPIOs (not used in FunKey), GPIO0 can be programmed as LDO5 output
  • 2x DC/DC SMPS DC-DC2 and DC-DC3
  • 5x LDOs (only 2 are used in FunKey, LDO5 is optionnaly output to GPIO0)

Looking at their datasheets, it is difficult to tell the difference between the AXP202AXP203 and AXP209 (any hint welcome!). In the FunKey design, we use an AXP209 because it is the one that comes along with the V3s when you buy it on AliExpress 😉

AXP20x Application Diagram

For complex dedicated chips like this, the best option is to follow as much as possible the application diagram and reference design given by the manufacturer, as the internals of the chips are seldom fully disclosed, so you need to take their word on some of the external component values to use.

The Allwinner V3s Reference Design contains on page 6 the schematics for using an AXP203 to supply the power to a V3s-based dashboard camera design. It follows closely the reference designs provided in the AXP20x datasheets:

More hints are provided in my self-translated V3s Hardware Design Guide (page 7) too.

FunKey PMIC Design Adaptation

The FunKey device uses all AXP209 integrated SMPS:

  •  the PWM charger DC-DC1
  • the DC-DC2 for providing the +1.25 V / 1.6A for the core
  • the DC-DC3 for providing the +3.3V / 1.2A for I/Os

But compared to the sophisticated reference designs, the FunKey device only uses 2 out of the 5 integrated LDOs:

  • LDO1 supplies the +3.3V / 30 mA Always On for the RTC
  • LDO2 provides the +3.0V / 200 mA for the analog power supply
  • LDO3 / LDO4 / LDO5 are not used by FunKey

Here is the Funkey schematic block for the PMIC:

This schematic may look intimidating and complex, but it is in fact just a collection of simple basic elements, and it is actually very close to the manufacturer-recommended design.

The most noticeable difference is that the FunKey schematics use symbols and placement that are as close as possible to their corresponding physical package and layout, instead of defining symbols that are conveniently arranged by logical properties. Even if this makes schematics more complex at first sight, the benefit of this approach is that the step to go from the schematics to the physical layout become much easier, and so is the debugging of the physical board, which is then very close to the schematics too.

Another habit that is used everywhere in the FunKey schematics is that all signals (except power supplies and GND) are routed using explicit wires, rather than counting on invisible connection by net names and relying of the reader to search these names all over the place. This forces related components to be clustered in compact groups to shorten the wires, and put more focus on inter-cluster signals, with a natural inclination to unravel wire nests in the schematics before laying out the actual board.

And there are some  “PWR_FLAG” symbols added here and there, which is the proper way in KiCAD to declare that a given net has a proper supply and thus prevent the ERC (Electrical Rule Check) to throw an error.

The end of this log details each PMIC function one by one:

Power Inputs (East side)

A wall-plug AC adapter input is not used in the FunKey device, so +VIN is just filtered using C75 on pins 32 and 33.

The USB power input +VUSB on pin 31 is filtered using C70, and the best (between +VUSB and +VBAT) available voltage is output to +VOUT on pins 34 and 35 and filtered using C78.

The BACKUP supply on pin 30 is not used and is left unconnected.

Internal Connections (All sides)

Some AXP20x signals are externally available and should be connected to external components:

  • The +2.5V internal logic voltage VINT on pin 26  is filtered using the recommended value for C67
  • The reference voltage VREF on pin 24 is decoupled with C64, and its BIAS connection on pin 23 is connected to a precision 200k 1% resistor R22, as recommended

Additionally, the AXP20x is actually made up of separate flexible blocks that require external interconnections to set their desired operation:

  • All DC/DC inputs (VIN1 on pin 44, VIN2 on pin 7 and VIN3 on pin 14), as well as LDO3IN input on pin 40 are connected to the best available voltage +VOUT with filter capacitors C59, C23, C30, and C69, respectively
  • LDO1SET on pin 27 is used to set the initial voltage of LDO1, and according to the datasheets, setting it to VINT sets its voltage to the desired +3.3V for the +3.3V Always On power supply
  • OTOH, combined LDO 2 and 4 input LDOIN24 on pin 13 is instead connected to +3.3V in order to minimize the voltage drop for LDO2 to generate the +3.0V. Here too, there is a filter capacitor C34
  • It is not clear what is the exact function of APS on pin 21 (it is described as “Internal Power Input”), but it is to be connected to +VOUT, too

DC-DC1 PWM Battery Charger (North East side)

The battery is connected to J5 (a 2-pin JST 1.0 mm pitch receptacle) and uses R21 as a precision current sense resistor, with C53/C56/C60 filter capacitors and L5 (a low-profile ferrite-core power inductor rated with a saturation current of 1.2A and low < 0.1 ohm resistance).

Please note that the battery is not protected on the board against reversing polarity, as the model used already contains a built-in protection.

R24 is mounted to simulate a battery NTC for measuring temperature, as the chosen LiPo battery does not feature this temperature sensor.

A user-programmable (through the I2C interface) charge LED D30 is provided, with its current-limiting resistor R26 (for which we need to raise the value as the LED is too bright!), as well as an TVS diode to prevent ESD, as the LED body will be accessible to to user.

DC-DC2 +1.25V / 1.6A (West side)

This SMPS is built around the ferrite core power inductor L3 and filter capacitors C26 and C29.

DC-DC3 +3.3V / 1.2A (South side)

This SMPS is built around the ferrite core power inductor L4 and filter capacitors C39 and C43.

LDO1 +3.3V Always On 30mA (South East side)

The LDO output on pin 28 is filtered with capacitor C72.

LDO2 +3.0V / 200mA (South West side)

The LDO output on pin 12 is filtered with capacitor C38.

LDO3 (North side)

This LDO is not used and its output on pin 41 is nevertheless filtered with a capacitor C63.

LDO4 (South West side)

This LDO is not used and its output on pin 11 is nevertheless filtered with a capacitor C38.

Power Key (North West side)

The AXP20x features a soft power key with internal short and long-press detection with user-programmable time settings, which enables turning power ON or OFF much like the way it is done in cellular phones.

Only a few external components are required: the tactile switch S13, its ESD protection TVS D29, and a low-pass filter R18 and C42 for debouncing the switch.

I2C Bus (North West side)

The AXP20x can be externally controlled by the main CPU using the I2C bus on pins 1 and 2. This bus has pull-up resistors to +3.3V R14 and R16, and the IRQ/WAKEUP signal on pin 48 enables warning or waking up the CPU on a selection of AXP20x-generated events, with a pull-up resistor R13 to +3.3V..

GPIOs (South and West sides)

GPIO0-3 on pins 19, 18, 5 and 3 are not used and are left unconnected.

PWROK (South West side)

The PWROK signal on pin 25 is used to generate the global RESET signal for the whole board, with a pull-up resistor R15 to the +3.3V Always On power supply.

Enable Signals (West side)

The global chip enable signal N_OE on pin 4 is always activated through a 2k resistor R17 to to GND.

The USB enable signal N_VBUSEN on pin 6 is directly tied to GND to always enable power from the USB bus.

Monitoring

Through the I2C bus and the numerous internal available registers, the AXP20x provides a very good control of its operation, including many threshold and timing settings, but also many voltage and curent monitoring values.

Coulomb Counters / Fuel Gauge

 It is well known that battery discharge voltage curve over time is very flat, making it very difficult to estimate the real charge/discharge state of the battery. Moreover, these states will vary with temperature, load, and aging.

The only accurate way to monitor the battery status is to actually count the energy that is stored when charging, and the one that is consumed. This particularly important feature is achieved in the AXP20x using a dual Coulomb counter which continuously sums the current intensity over time for monitoring the battery accurate charge and discharge status, with user-defined alert thresholds.

This fuel gauge is providing the ability to precisely report the remaining battery capacity, just like people are used to with cellular phones.

Why so many different Power Supply Voltages?

Looking back at the previous log on the CPU schematics, the FunKey device clearly needs a sophisticated power supply in order to fulfill the CPU power requirements. They are recalled below, along with the maximum current requirements found in the Allwinner V3s reference design (page 3):

  • +3.3V / 1.2A for the I/O power supply
  • +3.3V_AO / 30 mA for the Always-On power supply (RTC timer)
  • +3.0V / 200 mA for the analog power supply
  • +1.8V / 1A for the DDR2 DRAM power supply
  • +1.25V / 1.6 A for the core power supply

But why in the first place are so many different power supply voltages required?

Power Efficiency

A first answer is: for better power efficiency.

As P = U x I (Electrical power is the product of voltage level by current intensity), you can reduce power by decreasing the required current or reducing the operating voltage. Assuming you already do your best to reduce the required current, you can still reduce power by reducing voltage.

Reducing Power Supply Voltage

Voltage Drop

But how far can you go? Over long distance, you have the voltage drop from the conductor linear resistance, but this effect can be neglected for small boards. 

Noise Margin

You have inductive and capacitive coupling between conductive wires and planes too, but within a PCB, these coupling only have a limited direct effect on voltage. However, these coupling play a role in that they will pick up external electromagnetic noise from the surroundings and inject it into the circuit.

And with digital circuits, a critical limit when lowering the operating voltage is the “noise margin” or difference in absolute voltage levels between a logical ‘0’  and logical ‘1’, which determines the maximum amplitude of spurious voltage spikes that a conductor can pick up that will trigger an erroneous logic level change.

This phenomenon mostly depends on the circuit scale: a long-distance circuit between boards will require higher voltages (typically +12V or +24V) to limit this effect, whereas a circuit between boards a few meters apart or using through-hole chips on the same board wile require a lower voltage (typically +5V like the old Arduinos). Using SMT chips will allow even smaller boards and lower voltages (+3.3V is today typical), and with wires running on the same silicon die, it is possible to go down to +1.2V, given the current technological limits.

Voltage Swing

There are other reasons why you should try to minimize voltages: the core CPU for example needs to run as fast as possible, and lowering its operating voltage will shorten the signal rise and fall duration as the voltage swing is reduced.

Other Power Supply Considerations

Besides reducing the operating voltage, there are other considerations that may push to multiply the number of power supplies in a design:

Quiescent Current

As for power supply used for standby operation providing small currents,  a very-low leakage current (“quiescent current”) is required as it can no longer be neglected compared to the current required by the light load and even more importantly because this current consumption is permanent.

Ripple Voltage

For sensitive circuits such as ADCs (Analog to Digital Converters) or PLLs (Phase-Locked Loops) which rely on comparing very small voltage differences, a “clean” power supply featuring very low ripple voltage amplitude is required to achieve a good resolution and/or accuracy. This characteristic is only possible to obtain using LDOs and not SMPS, and the figure to pay attention to is then the PSRR (Power Supply Rejection Ratio) or how much a variation in the input voltage will affect the output voltage: the higher, the better! A value > 50 dB is a good starting point.

Application to the FunKey Design

Based on these considerations, it is now clear that each V3s power supply voltage has a good reason to exist:

  • +3.3V / 1.2A is used for powering the I/Os to connect between chips on the board. Given the required current, a SMPS is required for reaching a good efficiency
  • +3.3V_AO / 30 mA for the Always-On power supply (RTC timer) requires a low quiescent-current, so an LDO is used
  • +3.0V / 200 mA for the analog power supply also requires an LDO, this time to minimize the ripple voltage
  • +1.8V / 1A for the DDR2 DRAM power supply: this strange voltage level is typical for DDR2 DRAM memory chips, and is the result of driving the large memory array inside the chip
  • +1.25V / 1.6 A for powering the CPU core to minimize the voltage swing and increase the possible CPU frequency. Given the required current, a SMPS is required for reaching a good efficiency, too

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